AbstractOperatingSystem.st
branchjv
changeset 18237 8457ae63fa44
parent 18192 32a7c53ef4d0
parent 18229 872eb9c8e3b7
child 18285 7aab8c3dab19
--- a/AbstractOperatingSystem.st	Sat Apr 18 06:57:35 2015 +0200
+++ b/AbstractOperatingSystem.st	Mon Apr 20 06:40:26 2015 +0200
@@ -5998,6 +5998,13 @@
 %{  /* NOCONTEXT */
     unsigned INT low, high;
 
+#ifdef __x86_64__
+# if defined(__GCC__)
+    asm volatile("rdtsc" : "=a"(low), "=d"(high));
+    RETURN ( __MKUINT(low + (high << 32)) );
+# endif
+#endif
+
 #ifdef i386
     // use RDTSC instruction (retrieves 64bit cycle count; hi in EDX, lo in EAX)
 
@@ -6007,21 +6014,16 @@
     _asm { mov low,eax };
     _asm { mov high,edx };
     _asm { pop edx };
-# elif defined(__MINGW_H) || defined(__GNUC__)
+# else
+#  if defined(__MINGW_H) || defined(__GNUC__)
     asm volatile("rdtsc" : "=a"(low), "=d"(high));
-# else
+#  else
     goto unsupported;
+#  endif
 # endif
     RETURN ( __MKLARGEINT64(1, low, high) );
 #endif /* i386 */
 
-#ifdef __x86_64__
-# if defined(__GCC__)
-    asm volatile("rdtsc" : "=a"(low), "=d"(high));
-    RETURN ( __MKUINT(low + (high << 32)) );
-# endif
-#endif
-
 unsupported: ;
 %}.
     self primitiveFailed:'no CPU cycle register on this architecture'
@@ -7724,11 +7726,11 @@
 !AbstractOperatingSystem class methodsFor:'documentation'!
 
 version
-    ^ '$Header: /cvs/stx/stx/libbasic/AbstractOperatingSystem.st,v 1.296 2015-04-07 10:21:55 cg Exp $'
+    ^ '$Header: /cvs/stx/stx/libbasic/AbstractOperatingSystem.st,v 1.297 2015-04-19 09:46:54 cg Exp $'
 !
 
 version_CVS
-    ^ '$Header: /cvs/stx/stx/libbasic/AbstractOperatingSystem.st,v 1.296 2015-04-07 10:21:55 cg Exp $'
+    ^ '$Header: /cvs/stx/stx/libbasic/AbstractOperatingSystem.st,v 1.297 2015-04-19 09:46:54 cg Exp $'
 ! !