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4983
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"{ Package: 'stx:libbasic2' }"
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"{ NameSpace: Smalltalk }"
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LimitedPrecisionReal variableByteSubclass:#QuadFloat
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instanceVariableNames:''
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classVariableNames:'QuadFloatZero QuadFloatOne Pi E Epsilon NaN PositiveInfinity
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NegativeInfinity Halfpi HalfpiNegative'
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poolDictionaries:''
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category:'Magnitude-Numbers'
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!
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4991
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!QuadFloat primitiveDefinitions!
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%{
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4993
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#if __POINTER_SIZE__ == 8
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# define SUPPORT_QUADFLOAT
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#endif
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#ifdef SUPPORT_QUADFLOAT
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4992
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/*----------------------------------------------------------------------------
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| Software floating-point underflow tininess-detection mode.
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*----------------------------------------------------------------------------*/
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enum {
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softfloat_tininess_beforeRounding = 0,
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softfloat_tininess_afterRounding = 1
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};
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/*----------------------------------------------------------------------------
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| Software floating-point exception flags.
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*----------------------------------------------------------------------------*/
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enum {
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softfloat_flag_inexact = 1,
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softfloat_flag_underflow = 2,
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softfloat_flag_overflow = 4,
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softfloat_flag_infinite = 8,
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softfloat_flag_invalid = 16
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};
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/*----------------------------------------------------------------------------
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| Software floating-point rounding mode. (Mode "odd" is supported only if
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| SoftFloat is compiled with macro 'SOFTFLOAT_ROUND_ODD' defined.)
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*----------------------------------------------------------------------------*/
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enum {
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softfloat_round_near_even = 0,
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softfloat_round_minMag = 1,
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softfloat_round_min = 2,
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softfloat_round_max = 3,
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softfloat_round_near_maxMag = 4,
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softfloat_round_odd = 6
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};
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#define init_detectTininess softfloat_tininess_afterRounding
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52 |
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#if defined(LITTLEENDIAN) || defined(__LSB_FIRST__)
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struct uint128 { uint64_t v0, v64; };
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struct uint64_extra { uint64_t extra, v; };
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struct uint128_extra { uint64_t extra; struct uint128 v; };
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#else
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struct uint128 { uint64_t v64, v0; };
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struct uint64_extra { uint64_t v, extra; };
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struct uint128_extra { struct uint128 v; uint64_t extra; };
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#endif
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typedef unsigned char bool;
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typedef double float64_t;
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union ui64_f64 { uint64_t ui; float64_t f; };
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union ui128_f128 { struct uint128 ui; float128_t f; };
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/*----------------------------------------------------------------------------
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| The bit pattern for a default generated 128-bit floating-point NaN.
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*----------------------------------------------------------------------------*/
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#define defaultNaNF128UI96 0xFFFF8000
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#define defaultNaNF128UI64 0
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#define defaultNaNF128UI32 0
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#define defaultNaNF128UI0 0
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struct commonNaN {
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bool sign;
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#ifdef LITTLEENDIAN
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uint64_t v0, v64;
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#else
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uint64_t v64, v0;
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#endif
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};
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struct exp16_sig64 { int_fast16_t exp; uint_fast64_t sig; };
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4993
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#endif // SUPPORT_QUADFLOAT
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4992
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%}
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! !
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!QuadFloat primitiveVariables!
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%{
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4993
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#ifdef SUPPORT_QUADFLOAT
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4992
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uint_fast8_t softfloat_exceptionFlags;
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uint_fast8_t softfloat_roundingMode = softfloat_round_near_even;
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uint_fast8_t softfloat_detectTininess = init_detectTininess;
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uint_fast8_t softfloat_exceptionFlags = 0;
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const uint_least8_t softfloat_countLeadingZeros8[256] = {
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8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4,
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3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
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1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
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1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
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1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
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1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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};
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4993
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#endif // SUPPORT_QUADFLOAT
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120 |
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4991
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121 |
%}
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! !
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123 |
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4992
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124 |
!QuadFloat primitiveFunctions!
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125 |
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126 |
%{
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4993
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127 |
#ifdef SUPPORT_QUADFLOAT
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4992
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128 |
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129 |
#if defined(LITTLEENDIAN) || defined(__LSB_FIRST__)
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130 |
#define wordIncr 1
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131 |
#define indexWord( total, n ) (n)
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#define indexWordHi( total ) ((total) - 1)
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#define indexWordLo( total ) 0
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#define indexMultiword( total, m, n ) (n)
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#define indexMultiwordHi( total, n ) ((total) - (n))
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#define indexMultiwordLo( total, n ) 0
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#define indexMultiwordHiBut( total, n ) (n)
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#define indexMultiwordLoBut( total, n ) 0
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#define INIT_UINTM4( v3, v2, v1, v0 ) { v0, v1, v2, v3 }
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#else
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#define wordIncr -1
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#define indexWord( total, n ) ((total) - 1 - (n))
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#define indexWordHi( total ) 0
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#define indexWordLo( total ) ((total) - 1)
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#define indexMultiword( total, m, n ) ((total) - 1 - (m))
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#define indexMultiwordHi( total, n ) 0
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#define indexMultiwordLo( total, n ) ((total) - (n))
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#define indexMultiwordHiBut( total, n ) 0
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#define indexMultiwordLoBut( total, n ) (n)
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#define INIT_UINTM4( v3, v2, v1, v0 ) { v3, v2, v1, v0 }
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#endif
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152 |
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#define signF64UI( a ) ((bool) ((uint64_t) (a)>>63))
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#define expF64UI( a ) ((int_fast16_t) ((a)>>52) & 0x7FF)
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#define fracF64UI( a ) ((a) & UINT64_C( 0x000FFFFFFFFFFFFF ))
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#define softfloat_f64UIToCommonNaN( uiA, zPtr ) if ( ! ((uiA) & UINT64_C( 0x0008000000000000 )) ) softfloat_raiseFlags( softfloat_flag_invalid )
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157 |
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#define signF128UI64( a64 ) ((bool) ((uint64_t) (a64)>>63))
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#define expF128UI64( a64 ) ((int_fast32_t) ((a64)>>48) & 0x7FFF)
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#define fracF128UI64( a64 ) ((a64) & UINT64_C( 0x0000FFFFFFFFFFFF ))
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#define packToF128UI64( sign, exp, sig64 ) (((uint_fast64_t) (sign)<<63) + ((uint_fast64_t) (exp)<<48) + (sig64))
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162 |
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#define signF128UI96( a96 ) ((bool) ((uint32_t) (a96)>>31))
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#define expF128UI96( a96 ) ((int32_t) ((a96)>>16) & 0x7FFF)
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#define fracF128UI96( a96 ) ((a96) & 0x0000FFFF)
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#define packToF128UI96( sign, exp, sig96 ) (((uint32_t) (sign)<<31) + ((uint32_t) (exp)<<16) + (sig96))
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167 |
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#define isNaNF128UI( a64, a0 ) (((~(a64) & UINT64_C( 0x7FFF000000000000 )) == 0) && (a0 || ((a64) & UINT64_C( 0x0000FFFFFFFFFFFF ))))
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#define softfloat_isSigNaNF128UI( uiA64, uiA0 ) ((((uiA64) & UINT64_C( 0x7FFF800000000000 )) == UINT64_C( 0x7FFF000000000000 )) && ((uiA0) || ((uiA64) & UINT64_C( 0x00007FFFFFFFFFFF ))))
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#if 0
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static inline
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void
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softfloat_commonNaNToF128M( const struct commonNaN *aPtr, uint32_t *zWPtr )
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{
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zWPtr[indexWord( 4, 3 )] = defaultNaNF128UI96;
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zWPtr[indexWord( 4, 2 )] = defaultNaNF128UI64;
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zWPtr[indexWord( 4, 1 )] = defaultNaNF128UI32;
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zWPtr[indexWord( 4, 0 )] = defaultNaNF128UI0;
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}
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#else
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# define softfloat_commonNaNToF128M( aPtr, zWPtr ) \
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{ \
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(zWPtr)[indexWord( 4, 3 )] = defaultNaNF128UI96; \
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(zWPtr)[indexWord( 4, 2 )] = defaultNaNF128UI64; \
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(zWPtr)[indexWord( 4, 1 )] = defaultNaNF128UI32; \
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(zWPtr)[indexWord( 4, 0 )] = defaultNaNF128UI0; \
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}
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#endif
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void
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softfloat_raiseFlags( uint_fast8_t flags ) {
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softfloat_exceptionFlags |= flags;
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}
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195 |
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bool
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softfloat_eq128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 ){
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return (a64 == b64) && (a0 == b0);
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}
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200 |
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bool
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softfloat_lt128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 ){
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return (a64 < b64) || ((a64 == b64) && (a0 < b0));
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}
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205 |
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uint_fast8_t
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softfloat_countLeadingZeros64( uint64_t a )
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{
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209 |
uint_fast8_t count;
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uint32_t a32;
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211 |
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count = 0;
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a32 = a>>32;
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214 |
if ( ! a32 ) {
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count = 32;
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216 |
a32 = a;
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217 |
}
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218 |
/*------------------------------------------------------------------------
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219 |
| From here, result is current count + count leading zeros of `a32'.
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*------------------------------------------------------------------------*/
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221 |
if ( a32 < 0x10000 ) {
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count += 16;
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223 |
a32 <<= 16;
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224 |
}
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225 |
if ( a32 < 0x1000000 ) {
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226 |
count += 8;
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227 |
a32 <<= 8;
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}
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229 |
count += softfloat_countLeadingZeros8[a32>>24];
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return count;
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231 |
}
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232 |
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233 |
struct exp16_sig64
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234 |
softfloat_normSubnormalF64Sig( uint_fast64_t sig )
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235 |
{
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236 |
int_fast8_t shiftDist;
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237 |
struct exp16_sig64 z;
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238 |
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239 |
shiftDist = softfloat_countLeadingZeros64( sig ) - 11;
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240 |
z.exp = 1 - shiftDist;
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241 |
z.sig = sig<<shiftDist;
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242 |
return z;
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243 |
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244 |
}
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245 |
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246 |
struct uint128_extra
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247 |
softfloat_shiftRightJam128Extra(
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248 |
uint64_t a64, uint64_t a0, uint64_t extra, uint_fast32_t dist )
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249 |
{
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250 |
uint_fast8_t u8NegDist;
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251 |
struct uint128_extra z;
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252 |
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253 |
u8NegDist = -dist;
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254 |
if ( dist < 64 ) {
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255 |
z.v.v64 = a64>>dist;
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256 |
z.v.v0 = a64<<(u8NegDist & 63) | a0>>dist;
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257 |
z.extra = a0<<(u8NegDist & 63);
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258 |
} else {
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259 |
z.v.v64 = 0;
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260 |
if ( dist == 64 ) {
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261 |
z.v.v0 = a64;
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262 |
z.extra = a0;
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263 |
} else {
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264 |
extra |= a0;
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265 |
if ( dist < 128 ) {
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266 |
z.v.v0 = a64>>(dist & 63);
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267 |
z.extra = a64<<(u8NegDist & 63);
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268 |
} else {
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269 |
z.v.v0 = 0;
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270 |
z.extra = (dist == 128) ? a64 : (a64 != 0);
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271 |
}
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272 |
}
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273 |
}
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274 |
z.extra |= (extra != 0);
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275 |
return z;
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276 |
}
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277 |
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278 |
struct uint128_extra
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279 |
softfloat_shortShiftRightJam128Extra(
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280 |
uint64_t a64, uint64_t a0, uint64_t extra, uint_fast8_t dist )
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281 |
{
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282 |
uint_fast8_t negDist = -dist;
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283 |
struct uint128_extra z;
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284 |
z.v.v64 = a64>>dist;
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285 |
z.v.v0 = a64<<(negDist & 63) | a0>>dist;
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286 |
z.extra = a0<<(negDist & 63) | (extra != 0);
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287 |
return z;
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288 |
}
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289 |
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290 |
struct uint128
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291 |
softfloat_shiftRightJam128( uint64_t a64, uint64_t a0, uint_fast32_t dist )
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292 |
{
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293 |
uint_fast8_t u8NegDist;
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294 |
struct uint128 z;
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295 |
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296 |
if ( dist < 64 ) {
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297 |
u8NegDist = -dist;
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298 |
z.v64 = a64>>dist;
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299 |
z.v0 =
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300 |
a64<<(u8NegDist & 63) | a0>>dist
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301 |
| ((uint64_t) (a0<<(u8NegDist & 63)) != 0);
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302 |
} else {
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303 |
z.v64 = 0;
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304 |
z.v0 =
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305 |
(dist < 127)
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306 |
? a64>>(dist & 63)
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307 |
| (((a64 & (((uint_fast64_t) 1<<(dist & 63)) - 1)) | a0)
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308 |
!= 0)
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309 |
: ((a64 | a0) != 0);
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310 |
}
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311 |
return z;
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312 |
}
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313 |
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314 |
struct uint128
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315 |
softfloat_shortShiftLeft128( uint64_t a64, uint64_t a0, uint_fast8_t dist )
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316 |
{
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317 |
struct uint128 z;
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318 |
z.v64 = a64<<dist | a0>>(-dist & 63);
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319 |
z.v0 = a0<<dist;
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320 |
return z;
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|
|
321 |
}
|
|
|
322 |
|
|
|
323 |
struct uint128
|
|
|
324 |
softfloat_add128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 )
|
|
|
325 |
{
|
|
|
326 |
struct uint128 z;
|
|
|
327 |
z.v0 = a0 + b0;
|
|
|
328 |
z.v64 = a64 + b64 + (z.v0 < a0);
|
|
|
329 |
return z;
|
|
|
330 |
}
|
|
|
331 |
|
|
|
332 |
struct uint128
|
|
|
333 |
softfloat_sub128( uint64_t a64, uint64_t a0, uint64_t b64, uint64_t b0 )
|
|
|
334 |
{
|
|
|
335 |
struct uint128 z;
|
|
|
336 |
z.v0 = a0 - b0;
|
|
|
337 |
z.v64 = a64 - b64;
|
|
|
338 |
z.v64 -= (a0 < b0);
|
|
|
339 |
return z;
|
|
|
340 |
}
|
|
|
341 |
|
|
|
342 |
float128_t
|
|
|
343 |
softfloat_roundPackToF128(
|
|
|
344 |
bool sign,
|
|
|
345 |
int_fast32_t exp,
|
|
|
346 |
uint_fast64_t sig64,
|
|
|
347 |
uint_fast64_t sig0,
|
|
|
348 |
uint_fast64_t sigExtra
|
|
|
349 |
)
|
|
|
350 |
{
|
|
|
351 |
uint_fast8_t roundingMode;
|
|
|
352 |
bool roundNearEven, doIncrement, isTiny;
|
|
|
353 |
struct uint128_extra sig128Extra;
|
|
|
354 |
uint_fast64_t uiZ64, uiZ0;
|
|
|
355 |
struct uint128 sig128;
|
|
|
356 |
union ui128_f128 uZ;
|
|
|
357 |
|
|
|
358 |
/*------------------------------------------------------------------------
|
|
|
359 |
*------------------------------------------------------------------------*/
|
|
|
360 |
roundingMode = softfloat_roundingMode;
|
|
|
361 |
roundNearEven = (roundingMode == softfloat_round_near_even);
|
|
|
362 |
doIncrement = (UINT64_C( 0x8000000000000000 ) <= sigExtra);
|
|
|
363 |
if ( ! roundNearEven && (roundingMode != softfloat_round_near_maxMag) ) {
|
|
|
364 |
doIncrement =
|
|
|
365 |
(roundingMode
|
|
|
366 |
== (sign ? softfloat_round_min : softfloat_round_max))
|
|
|
367 |
&& sigExtra;
|
|
|
368 |
}
|
|
|
369 |
/*------------------------------------------------------------------------
|
|
|
370 |
*------------------------------------------------------------------------*/
|
|
|
371 |
if ( 0x7FFD <= (uint32_t) exp ) {
|
|
|
372 |
if ( exp < 0 ) {
|
|
|
373 |
/*----------------------------------------------------------------
|
|
|
374 |
*----------------------------------------------------------------*/
|
|
|
375 |
isTiny =
|
|
|
376 |
(softfloat_detectTininess
|
|
|
377 |
== softfloat_tininess_beforeRounding)
|
|
|
378 |
|| (exp < -1)
|
|
|
379 |
|| ! doIncrement
|
|
|
380 |
|| softfloat_lt128(
|
|
|
381 |
sig64,
|
|
|
382 |
sig0,
|
|
|
383 |
UINT64_C( 0x0001FFFFFFFFFFFF ),
|
|
|
384 |
UINT64_C( 0xFFFFFFFFFFFFFFFF )
|
|
|
385 |
);
|
|
|
386 |
sig128Extra =
|
|
|
387 |
softfloat_shiftRightJam128Extra( sig64, sig0, sigExtra, -exp );
|
|
|
388 |
sig64 = sig128Extra.v.v64;
|
|
|
389 |
sig0 = sig128Extra.v.v0;
|
|
|
390 |
sigExtra = sig128Extra.extra;
|
|
|
391 |
exp = 0;
|
|
|
392 |
if ( isTiny && sigExtra ) {
|
|
|
393 |
softfloat_raiseFlags( softfloat_flag_underflow );
|
|
|
394 |
}
|
|
|
395 |
doIncrement = (UINT64_C( 0x8000000000000000 ) <= sigExtra);
|
|
|
396 |
if (
|
|
|
397 |
! roundNearEven
|
|
|
398 |
&& (roundingMode != softfloat_round_near_maxMag)
|
|
|
399 |
) {
|
|
|
400 |
doIncrement =
|
|
|
401 |
(roundingMode
|
|
|
402 |
== (sign ? softfloat_round_min : softfloat_round_max))
|
|
|
403 |
&& sigExtra;
|
|
|
404 |
}
|
|
|
405 |
} else if (
|
|
|
406 |
(0x7FFD < exp)
|
|
|
407 |
|| ((exp == 0x7FFD)
|
|
|
408 |
&& softfloat_eq128(
|
|
|
409 |
sig64,
|
|
|
410 |
sig0,
|
|
|
411 |
UINT64_C( 0x0001FFFFFFFFFFFF ),
|
|
|
412 |
UINT64_C( 0xFFFFFFFFFFFFFFFF )
|
|
|
413 |
)
|
|
|
414 |
&& doIncrement)
|
|
|
415 |
) {
|
|
|
416 |
/*----------------------------------------------------------------
|
|
|
417 |
*----------------------------------------------------------------*/
|
|
|
418 |
softfloat_raiseFlags(
|
|
|
419 |
softfloat_flag_overflow | softfloat_flag_inexact );
|
|
|
420 |
if (
|
|
|
421 |
roundNearEven
|
|
|
422 |
|| (roundingMode == softfloat_round_near_maxMag)
|
|
|
423 |
|| (roundingMode
|
|
|
424 |
== (sign ? softfloat_round_min : softfloat_round_max))
|
|
|
425 |
) {
|
|
|
426 |
uiZ64 = packToF128UI64( sign, 0x7FFF, 0 );
|
|
|
427 |
uiZ0 = 0;
|
|
|
428 |
} else {
|
|
|
429 |
uiZ64 =
|
|
|
430 |
packToF128UI64(
|
|
|
431 |
sign, 0x7FFE, UINT64_C( 0x0000FFFFFFFFFFFF ) );
|
|
|
432 |
uiZ0 = UINT64_C( 0xFFFFFFFFFFFFFFFF );
|
|
|
433 |
}
|
|
|
434 |
goto uiZ;
|
|
|
435 |
}
|
|
|
436 |
}
|
|
|
437 |
/*------------------------------------------------------------------------
|
|
|
438 |
*------------------------------------------------------------------------*/
|
|
|
439 |
if ( sigExtra ) {
|
|
|
440 |
softfloat_exceptionFlags |= softfloat_flag_inexact;
|
|
|
441 |
#ifdef SOFTFLOAT_ROUND_ODD
|
|
|
442 |
if ( roundingMode == softfloat_round_odd ) {
|
|
|
443 |
sig0 |= 1;
|
|
|
444 |
goto packReturn;
|
|
|
445 |
}
|
|
|
446 |
#endif
|
|
|
447 |
}
|
|
|
448 |
if ( doIncrement ) {
|
|
|
449 |
sig128 = softfloat_add128( sig64, sig0, 0, 1 );
|
|
|
450 |
sig64 = sig128.v64;
|
|
|
451 |
sig0 =
|
|
|
452 |
sig128.v0
|
|
|
453 |
& ~(uint64_t)
|
|
|
454 |
(! (sigExtra & UINT64_C( 0x7FFFFFFFFFFFFFFF ))
|
|
|
455 |
& roundNearEven);
|
|
|
456 |
} else {
|
|
|
457 |
if ( ! (sig64 | sig0) ) exp = 0;
|
|
|
458 |
}
|
|
|
459 |
/*------------------------------------------------------------------------
|
|
|
460 |
*------------------------------------------------------------------------*/
|
|
|
461 |
packReturn:
|
|
|
462 |
uiZ64 = packToF128UI64( sign, exp, sig64 );
|
|
|
463 |
uiZ0 = sig0;
|
|
|
464 |
uiZ:
|
|
|
465 |
uZ.ui.v64 = uiZ64;
|
|
|
466 |
uZ.ui.v0 = uiZ0;
|
|
|
467 |
return uZ.f;
|
|
|
468 |
}
|
|
|
469 |
|
|
|
470 |
float128_t
|
|
|
471 |
softfloat_normRoundPackToF128(
|
|
|
472 |
bool sign, int_fast32_t exp, uint_fast64_t sig64, uint_fast64_t sig0 )
|
|
|
473 |
{
|
|
|
474 |
int_fast8_t shiftDist;
|
|
|
475 |
struct uint128 sig128;
|
|
|
476 |
union ui128_f128 uZ;
|
|
|
477 |
uint_fast64_t sigExtra;
|
|
|
478 |
struct uint128_extra sig128Extra;
|
|
|
479 |
|
|
|
480 |
if ( ! sig64 ) {
|
|
|
481 |
exp -= 64;
|
|
|
482 |
sig64 = sig0;
|
|
|
483 |
sig0 = 0;
|
|
|
484 |
}
|
|
|
485 |
shiftDist = softfloat_countLeadingZeros64( sig64 ) - 15;
|
|
|
486 |
exp -= shiftDist;
|
|
|
487 |
if ( 0 <= shiftDist ) {
|
|
|
488 |
if ( shiftDist ) {
|
|
|
489 |
sig128 = softfloat_shortShiftLeft128( sig64, sig0, shiftDist );
|
|
|
490 |
sig64 = sig128.v64;
|
|
|
491 |
sig0 = sig128.v0;
|
|
|
492 |
}
|
|
|
493 |
if ( (uint32_t) exp < 0x7FFD ) {
|
|
|
494 |
uZ.ui.v64 = packToF128UI64( sign, sig64 | sig0 ? exp : 0, sig64 );
|
|
|
495 |
uZ.ui.v0 = sig0;
|
|
|
496 |
return uZ.f;
|
|
|
497 |
}
|
|
|
498 |
sigExtra = 0;
|
|
|
499 |
} else {
|
|
|
500 |
sig128Extra =
|
|
|
501 |
softfloat_shortShiftRightJam128Extra( sig64, sig0, 0, -shiftDist );
|
|
|
502 |
sig64 = sig128Extra.v.v64;
|
|
|
503 |
sig0 = sig128Extra.v.v0;
|
|
|
504 |
sigExtra = sig128Extra.extra;
|
|
|
505 |
}
|
|
|
506 |
return softfloat_roundPackToF128( sign, exp, sig64, sig0, sigExtra );
|
|
|
507 |
}
|
|
|
508 |
|
|
|
509 |
struct uint128
|
|
|
510 |
softfloat_propagateNaNF128UI(
|
|
|
511 |
uint_fast64_t uiA64,
|
|
|
512 |
uint_fast64_t uiA0,
|
|
|
513 |
uint_fast64_t uiB64,
|
|
|
514 |
uint_fast64_t uiB0
|
|
|
515 |
)
|
|
|
516 |
{
|
|
|
517 |
bool isSigNaNA, isSigNaNB;
|
|
|
518 |
uint_fast64_t uiNonsigA64, uiNonsigB64, uiMagA64, uiMagB64;
|
|
|
519 |
struct uint128 uiZ;
|
|
|
520 |
|
|
|
521 |
/*------------------------------------------------------------------------
|
|
|
522 |
*------------------------------------------------------------------------*/
|
|
|
523 |
isSigNaNA = softfloat_isSigNaNF128UI( uiA64, uiA0 );
|
|
|
524 |
isSigNaNB = softfloat_isSigNaNF128UI( uiB64, uiB0 );
|
|
|
525 |
/*------------------------------------------------------------------------
|
|
|
526 |
| Make NaNs non-signaling.
|
|
|
527 |
*------------------------------------------------------------------------*/
|
|
|
528 |
uiNonsigA64 = uiA64 | UINT64_C( 0x0000800000000000 );
|
|
|
529 |
uiNonsigB64 = uiB64 | UINT64_C( 0x0000800000000000 );
|
|
|
530 |
/*------------------------------------------------------------------------
|
|
|
531 |
*------------------------------------------------------------------------*/
|
|
|
532 |
if ( isSigNaNA | isSigNaNB ) {
|
|
|
533 |
softfloat_raiseFlags( softfloat_flag_invalid );
|
|
|
534 |
if ( isSigNaNA ) {
|
|
|
535 |
if ( isSigNaNB ) goto returnLargerMag;
|
|
|
536 |
if ( isNaNF128UI( uiB64, uiB0 ) ) goto returnB;
|
|
|
537 |
goto returnA;
|
|
|
538 |
} else {
|
|
|
539 |
if ( isNaNF128UI( uiA64, uiA0 ) ) goto returnA;
|
|
|
540 |
goto returnB;
|
|
|
541 |
}
|
|
|
542 |
}
|
|
|
543 |
returnLargerMag:
|
|
|
544 |
uiMagA64 = uiA64 & UINT64_C( 0x7FFFFFFFFFFFFFFF );
|
|
|
545 |
uiMagB64 = uiB64 & UINT64_C( 0x7FFFFFFFFFFFFFFF );
|
|
|
546 |
if ( uiMagA64 < uiMagB64 ) goto returnB;
|
|
|
547 |
if ( uiMagB64 < uiMagA64 ) goto returnA;
|
|
|
548 |
if ( uiA0 < uiB0 ) goto returnB;
|
|
|
549 |
if ( uiB0 < uiA0 ) goto returnA;
|
|
|
550 |
if ( uiNonsigA64 < uiNonsigB64 ) goto returnA;
|
|
|
551 |
returnB:
|
|
|
552 |
uiZ.v64 = uiNonsigB64;
|
|
|
553 |
uiZ.v0 = uiB0;
|
|
|
554 |
return uiZ;
|
|
|
555 |
returnA:
|
|
|
556 |
uiZ.v64 = uiNonsigA64;
|
|
|
557 |
uiZ.v0 = uiA0;
|
|
|
558 |
return uiZ;
|
|
|
559 |
|
|
|
560 |
}
|
|
|
561 |
|
|
|
562 |
void
|
|
|
563 |
f64_to_f128M( float64_t a, float128_t *zPtr )
|
|
|
564 |
{
|
|
|
565 |
uint32_t *zWPtr;
|
|
|
566 |
union ui64_f64 uA;
|
|
|
567 |
uint64_t uiA;
|
|
|
568 |
bool sign;
|
|
|
569 |
int_fast16_t exp;
|
|
|
570 |
uint64_t frac;
|
|
|
571 |
struct commonNaN commonNaN;
|
|
|
572 |
uint32_t uiZ96;
|
|
|
573 |
struct exp16_sig64 normExpSig;
|
|
|
574 |
|
|
|
575 |
/*------------------------------------------------------------------------
|
|
|
576 |
*------------------------------------------------------------------------*/
|
|
|
577 |
zWPtr = (uint32_t *) zPtr;
|
|
|
578 |
/*------------------------------------------------------------------------
|
|
|
579 |
*------------------------------------------------------------------------*/
|
|
|
580 |
uA.f = a;
|
|
|
581 |
uiA = uA.ui;
|
|
|
582 |
sign = signF64UI( uiA );
|
|
|
583 |
exp = expF64UI( uiA );
|
|
|
584 |
frac = fracF64UI( uiA );
|
|
|
585 |
/*------------------------------------------------------------------------
|
|
|
586 |
*------------------------------------------------------------------------*/
|
|
|
587 |
zWPtr[indexWord( 4, 0 )] = 0;
|
|
|
588 |
if ( exp == 0x7FF ) {
|
|
|
589 |
if ( frac ) {
|
|
|
590 |
softfloat_f64UIToCommonNaN( uiA, &commonNaN );
|
|
|
591 |
softfloat_commonNaNToF128M( &commonNaN, zWPtr );
|
|
|
592 |
return;
|
|
|
593 |
}
|
|
|
594 |
uiZ96 = packToF128UI96( sign, 0x7FFF, 0 );
|
|
|
595 |
goto uiZ;
|
|
|
596 |
}
|
|
|
597 |
/*------------------------------------------------------------------------
|
|
|
598 |
*------------------------------------------------------------------------*/
|
|
|
599 |
if ( ! exp ) {
|
|
|
600 |
if ( ! frac ) {
|
|
|
601 |
uiZ96 = packToF128UI96( sign, 0, 0 );
|
|
|
602 |
goto uiZ;
|
|
|
603 |
}
|
|
|
604 |
normExpSig = softfloat_normSubnormalF64Sig( frac );
|
|
|
605 |
exp = normExpSig.exp - 1;
|
|
|
606 |
frac = normExpSig.sig;
|
|
|
607 |
}
|
|
|
608 |
/*------------------------------------------------------------------------
|
|
|
609 |
*------------------------------------------------------------------------*/
|
|
|
610 |
zWPtr[indexWord( 4, 1 )] = (uint32_t) frac<<28;
|
|
|
611 |
frac >>= 4;
|
|
|
612 |
zWPtr[indexWordHi( 4 )] = packToF128UI96( sign, exp + 0x3C00, frac>>32 );
|
|
|
613 |
zWPtr[indexWord( 4, 2 )] = frac;
|
|
|
614 |
return;
|
|
|
615 |
/*------------------------------------------------------------------------
|
|
|
616 |
*------------------------------------------------------------------------*/
|
|
|
617 |
uiZ:
|
|
|
618 |
zWPtr[indexWord( 4, 3 )] = uiZ96;
|
|
|
619 |
zWPtr[indexWord( 4, 2 )] = 0;
|
|
|
620 |
zWPtr[indexWord( 4, 1 )] = 0;
|
|
|
621 |
|
|
|
622 |
}
|
|
|
623 |
|
|
|
624 |
static float128_t
|
|
|
625 |
softfloat_addMagsF128(
|
|
|
626 |
uint64_t uiA64,
|
|
|
627 |
uint64_t uiA0,
|
|
|
628 |
uint64_t uiB64,
|
|
|
629 |
uint64_t uiB0,
|
|
|
630 |
bool signZ
|
|
|
631 |
)
|
|
|
632 |
{
|
|
|
633 |
int32_t expA;
|
|
|
634 |
struct uint128 sigA;
|
|
|
635 |
int32_t expB;
|
|
|
636 |
struct uint128 sigB;
|
|
|
637 |
int32_t expDiff;
|
|
|
638 |
struct uint128 uiZ, sigZ;
|
|
|
639 |
int32_t expZ;
|
|
|
640 |
uint64_t sigZExtra;
|
|
|
641 |
struct uint128_extra sig128Extra;
|
|
|
642 |
union ui128_f128 uZ;
|
|
|
643 |
|
|
|
644 |
expA = expF128UI64( uiA64 );
|
|
|
645 |
sigA.v64 = fracF128UI64( uiA64 );
|
|
|
646 |
sigA.v0 = uiA0;
|
|
|
647 |
expB = expF128UI64( uiB64 );
|
|
|
648 |
sigB.v64 = fracF128UI64( uiB64 );
|
|
|
649 |
sigB.v0 = uiB0;
|
|
|
650 |
expDiff = expA - expB;
|
|
|
651 |
if ( ! expDiff ) {
|
|
|
652 |
if ( expA == 0x7FFF ) {
|
|
|
653 |
if ( sigA.v64 | sigA.v0 | sigB.v64 | sigB.v0 ) goto propagateNaN;
|
|
|
654 |
uiZ.v64 = uiA64;
|
|
|
655 |
uiZ.v0 = uiA0;
|
|
|
656 |
goto uiZ;
|
|
|
657 |
}
|
|
|
658 |
sigZ = softfloat_add128( sigA.v64, sigA.v0, sigB.v64, sigB.v0 );
|
|
|
659 |
if ( ! expA ) {
|
|
|
660 |
uiZ.v64 = packToF128UI64( signZ, 0, sigZ.v64 );
|
|
|
661 |
uiZ.v0 = sigZ.v0;
|
|
|
662 |
goto uiZ;
|
|
|
663 |
}
|
|
|
664 |
expZ = expA;
|
|
|
665 |
sigZ.v64 |= UINT64_C( 0x0002000000000000 );
|
|
|
666 |
sigZExtra = 0;
|
|
|
667 |
goto shiftRight1;
|
|
|
668 |
}
|
|
|
669 |
if ( expDiff < 0 ) {
|
|
|
670 |
if ( expB == 0x7FFF ) {
|
|
|
671 |
if ( sigB.v64 | sigB.v0 ) goto propagateNaN;
|
|
|
672 |
uiZ.v64 = packToF128UI64( signZ, 0x7FFF, 0 );
|
|
|
673 |
uiZ.v0 = 0;
|
|
|
674 |
goto uiZ;
|
|
|
675 |
}
|
|
|
676 |
expZ = expB;
|
|
|
677 |
if ( expA ) {
|
|
|
678 |
sigA.v64 |= UINT64_C( 0x0001000000000000 );
|
|
|
679 |
} else {
|
|
|
680 |
++expDiff;
|
|
|
681 |
sigZExtra = 0;
|
|
|
682 |
if ( ! expDiff ) goto newlyAligned;
|
|
|
683 |
}
|
|
|
684 |
sig128Extra =
|
|
|
685 |
softfloat_shiftRightJam128Extra( sigA.v64, sigA.v0, 0, -expDiff );
|
|
|
686 |
sigA = sig128Extra.v;
|
|
|
687 |
sigZExtra = sig128Extra.extra;
|
|
|
688 |
} else {
|
|
|
689 |
if ( expA == 0x7FFF ) {
|
|
|
690 |
if ( sigA.v64 | sigA.v0 ) goto propagateNaN;
|
|
|
691 |
uiZ.v64 = uiA64;
|
|
|
692 |
uiZ.v0 = uiA0;
|
|
|
693 |
goto uiZ;
|
|
|
694 |
}
|
|
|
695 |
expZ = expA;
|
|
|
696 |
if ( expB ) {
|
|
|
697 |
sigB.v64 |= UINT64_C( 0x0001000000000000 );
|
|
|
698 |
} else {
|
|
|
699 |
--expDiff;
|
|
|
700 |
sigZExtra = 0;
|
|
|
701 |
if ( ! expDiff ) goto newlyAligned;
|
|
|
702 |
}
|
|
|
703 |
sig128Extra =
|
|
|
704 |
softfloat_shiftRightJam128Extra( sigB.v64, sigB.v0, 0, expDiff );
|
|
|
705 |
sigB = sig128Extra.v;
|
|
|
706 |
sigZExtra = sig128Extra.extra;
|
|
|
707 |
}
|
|
|
708 |
newlyAligned:
|
|
|
709 |
sigZ =
|
|
|
710 |
softfloat_add128(
|
|
|
711 |
sigA.v64 | UINT64_C( 0x0001000000000000 ),
|
|
|
712 |
sigA.v0,
|
|
|
713 |
sigB.v64,
|
|
|
714 |
sigB.v0
|
|
|
715 |
);
|
|
|
716 |
--expZ;
|
|
|
717 |
if ( sigZ.v64 < UINT64_C( 0x0002000000000000 ) ) goto roundAndPack;
|
|
|
718 |
++expZ;
|
|
|
719 |
shiftRight1:
|
|
|
720 |
sig128Extra =
|
|
|
721 |
softfloat_shortShiftRightJam128Extra(
|
|
|
722 |
sigZ.v64, sigZ.v0, sigZExtra, 1 );
|
|
|
723 |
sigZ = sig128Extra.v;
|
|
|
724 |
sigZExtra = sig128Extra.extra;
|
|
|
725 |
roundAndPack:
|
|
|
726 |
return
|
|
|
727 |
softfloat_roundPackToF128( signZ, expZ, sigZ.v64, sigZ.v0, sigZExtra );
|
|
|
728 |
propagateNaN:
|
|
|
729 |
uiZ = softfloat_propagateNaNF128UI( uiA64, uiA0, uiB64, uiB0 );
|
|
|
730 |
uiZ:
|
|
|
731 |
uZ.ui = uiZ;
|
|
|
732 |
return uZ.f;
|
|
|
733 |
|
|
|
734 |
}
|
|
|
735 |
|
|
|
736 |
float128_t
|
|
|
737 |
softfloat_subMagsF128(
|
|
|
738 |
uint_fast64_t uiA64,
|
|
|
739 |
uint_fast64_t uiA0,
|
|
|
740 |
uint_fast64_t uiB64,
|
|
|
741 |
uint_fast64_t uiB0,
|
|
|
742 |
bool signZ
|
|
|
743 |
)
|
|
|
744 |
{
|
|
|
745 |
int_fast32_t expA;
|
|
|
746 |
struct uint128 sigA;
|
|
|
747 |
int_fast32_t expB;
|
|
|
748 |
struct uint128 sigB, sigZ;
|
|
|
749 |
int_fast32_t expDiff, expZ;
|
|
|
750 |
struct uint128 uiZ;
|
|
|
751 |
union ui128_f128 uZ;
|
|
|
752 |
|
|
|
753 |
expA = expF128UI64( uiA64 );
|
|
|
754 |
sigA.v64 = fracF128UI64( uiA64 );
|
|
|
755 |
sigA.v0 = uiA0;
|
|
|
756 |
expB = expF128UI64( uiB64 );
|
|
|
757 |
sigB.v64 = fracF128UI64( uiB64 );
|
|
|
758 |
sigB.v0 = uiB0;
|
|
|
759 |
sigA = softfloat_shortShiftLeft128( sigA.v64, sigA.v0, 4 );
|
|
|
760 |
sigB = softfloat_shortShiftLeft128( sigB.v64, sigB.v0, 4 );
|
|
|
761 |
expDiff = expA - expB;
|
|
|
762 |
if ( 0 < expDiff ) goto expABigger;
|
|
|
763 |
if ( expDiff < 0 ) goto expBBigger;
|
|
|
764 |
if ( expA == 0x7FFF ) {
|
|
|
765 |
if ( sigA.v64 | sigA.v0 | sigB.v64 | sigB.v0 ) goto propagateNaN;
|
|
|
766 |
softfloat_raiseFlags( softfloat_flag_invalid );
|
|
|
767 |
uiZ.v64 = defaultNaNF128UI64;
|
|
|
768 |
uiZ.v0 = defaultNaNF128UI0;
|
|
|
769 |
goto uiZ;
|
|
|
770 |
}
|
|
|
771 |
expZ = expA;
|
|
|
772 |
if ( ! expZ ) expZ = 1;
|
|
|
773 |
if ( sigB.v64 < sigA.v64 ) goto aBigger;
|
|
|
774 |
if ( sigA.v64 < sigB.v64 ) goto bBigger;
|
|
|
775 |
if ( sigB.v0 < sigA.v0 ) goto aBigger;
|
|
|
776 |
if ( sigA.v0 < sigB.v0 ) goto bBigger;
|
|
|
777 |
uiZ.v64 =
|
|
|
778 |
packToF128UI64(
|
|
|
779 |
(softfloat_roundingMode == softfloat_round_min), 0, 0 );
|
|
|
780 |
uiZ.v0 = 0;
|
|
|
781 |
goto uiZ;
|
|
|
782 |
expBBigger:
|
|
|
783 |
if ( expB == 0x7FFF ) {
|
|
|
784 |
if ( sigB.v64 | sigB.v0 ) goto propagateNaN;
|
|
|
785 |
uiZ.v64 = packToF128UI64( signZ ^ 1, 0x7FFF, 0 );
|
|
|
786 |
uiZ.v0 = 0;
|
|
|
787 |
goto uiZ;
|
|
|
788 |
}
|
|
|
789 |
if ( expA ) {
|
|
|
790 |
sigA.v64 |= UINT64_C( 0x0010000000000000 );
|
|
|
791 |
} else {
|
|
|
792 |
++expDiff;
|
|
|
793 |
if ( ! expDiff ) goto newlyAlignedBBigger;
|
|
|
794 |
}
|
|
|
795 |
sigA = softfloat_shiftRightJam128( sigA.v64, sigA.v0, -expDiff );
|
|
|
796 |
newlyAlignedBBigger:
|
|
|
797 |
expZ = expB;
|
|
|
798 |
sigB.v64 |= UINT64_C( 0x0010000000000000 );
|
|
|
799 |
bBigger:
|
|
|
800 |
signZ = ! signZ;
|
|
|
801 |
sigZ = softfloat_sub128( sigB.v64, sigB.v0, sigA.v64, sigA.v0 );
|
|
|
802 |
goto normRoundPack;
|
|
|
803 |
expABigger:
|
|
|
804 |
if ( expA == 0x7FFF ) {
|
|
|
805 |
if ( sigA.v64 | sigA.v0 ) goto propagateNaN;
|
|
|
806 |
uiZ.v64 = uiA64;
|
|
|
807 |
uiZ.v0 = uiA0;
|
|
|
808 |
goto uiZ;
|
|
|
809 |
}
|
|
|
810 |
if ( expB ) {
|
|
|
811 |
sigB.v64 |= UINT64_C( 0x0010000000000000 );
|
|
|
812 |
} else {
|
|
|
813 |
--expDiff;
|
|
|
814 |
if ( ! expDiff ) goto newlyAlignedABigger;
|
|
|
815 |
}
|
|
|
816 |
sigB = softfloat_shiftRightJam128( sigB.v64, sigB.v0, expDiff );
|
|
|
817 |
newlyAlignedABigger:
|
|
|
818 |
expZ = expA;
|
|
|
819 |
sigA.v64 |= UINT64_C( 0x0010000000000000 );
|
|
|
820 |
aBigger:
|
|
|
821 |
sigZ = softfloat_sub128( sigA.v64, sigA.v0, sigB.v64, sigB.v0 );
|
|
|
822 |
normRoundPack:
|
|
|
823 |
return softfloat_normRoundPackToF128( signZ, expZ - 5, sigZ.v64, sigZ.v0 );
|
|
|
824 |
propagateNaN:
|
|
|
825 |
uiZ = softfloat_propagateNaNF128UI( uiA64, uiA0, uiB64, uiB0 );
|
|
|
826 |
uiZ:
|
|
|
827 |
uZ.ui = uiZ;
|
|
|
828 |
return uZ.f;
|
|
|
829 |
|
|
|
830 |
}
|
|
|
831 |
|
|
|
832 |
void
|
|
|
833 |
f128M_add( const float128_t *aPtr, const float128_t *bPtr, float128_t *zPtr )
|
|
|
834 |
{
|
|
|
835 |
const uint64_t *aWPtr, *bWPtr;
|
|
|
836 |
uint64_t uiA64, uiA0;
|
|
|
837 |
int signA;
|
|
|
838 |
uint64_t uiB64, uiB0;
|
|
|
839 |
int signB;
|
|
|
840 |
|
|
|
841 |
aWPtr = (const uint64_t *) aPtr;
|
|
|
842 |
bWPtr = (const uint64_t *) bPtr;
|
|
|
843 |
uiA64 = aWPtr[indexWord( 2, 1 )];
|
|
|
844 |
uiA0 = aWPtr[indexWord( 2, 0 )];
|
|
|
845 |
signA = signF128UI64( uiA64 );
|
|
|
846 |
uiB64 = bWPtr[indexWord( 2, 1 )];
|
|
|
847 |
uiB0 = bWPtr[indexWord( 2, 0 )];
|
|
|
848 |
signB = signF128UI64( uiB64 );
|
|
|
849 |
|
|
|
850 |
if ( signA == signB ) {
|
|
|
851 |
*zPtr = softfloat_addMagsF128( uiA64, uiA0, uiB64, uiB0, signA );
|
|
|
852 |
} else {
|
|
|
853 |
*zPtr = softfloat_subMagsF128( uiA64, uiA0, uiB64, uiB0, signA );
|
|
|
854 |
}
|
|
|
855 |
|
|
|
856 |
}
|
|
4993
|
857 |
#endif // SUPPORT_QUADFLOAT
|
|
4992
|
858 |
|
|
|
859 |
%}
|
|
|
860 |
! !
|
|
4991
|
861 |
|
|
4983
|
862 |
!QuadFloat class methodsFor:'documentation'!
|
|
|
863 |
|
|
|
864 |
documentation
|
|
|
865 |
"
|
|
|
866 |
QuadFloats represent rational numbers with limited precision
|
|
|
867 |
and are mapped to IEEE quadruple precision format (128bit).
|
|
|
868 |
If the underlying cpu supports them natively, the machine format (long double) is
|
|
|
869 |
used. Otherwise, a software emulation is done, which is much slower.
|
|
|
870 |
Thus only use them, if you really need the additional precision;
|
|
|
871 |
if not, use Float (which are doubles) or LongFloats which usually have IEEE extended precision (80bit).
|
|
|
872 |
|
|
|
873 |
QuadFloats give you definite 128 bit quadruple floats,
|
|
|
874 |
thus, code using quadFloats is guaranteed to be portable from one architecture to another.
|
|
|
875 |
|
|
|
876 |
Representation:
|
|
4991
|
877 |
128bit quadruple IEEE floats (16bytes);
|
|
|
878 |
112 bit mantissa,
|
|
|
879 |
16 bit exponent,
|
|
|
880 |
34 decimal digits (approx.)
|
|
4983
|
881 |
|
|
4992
|
882 |
On Sparc CPUs, this is a native supported type (long double) and fast;
|
|
|
883 |
on x86 CPUs, this is emulated and slow.
|
|
|
884 |
|
|
4983
|
885 |
Mixed mode arithmetic:
|
|
4991
|
886 |
quadFloat op anyFloat -> longFloat
|
|
|
887 |
longFloat op complex -> complex
|
|
4983
|
888 |
|
|
|
889 |
Range and precision of storage formats: see LimitedPrecisionReal >> documentation
|
|
|
890 |
|
|
|
891 |
[author:]
|
|
4991
|
892 |
Claus Gittinger
|
|
4983
|
893 |
|
|
|
894 |
[see also:]
|
|
4991
|
895 |
Number
|
|
|
896 |
Float ShortFloat LongFloat Fraction FixedPoint Integer Complex
|
|
|
897 |
FloatArray DoubleArray
|
|
|
898 |
https://en.wikipedia.org/wiki/Extended_precision
|
|
4983
|
899 |
"
|
|
|
900 |
! !
|
|
|
901 |
|
|
|
902 |
!QuadFloat class methodsFor:'instance creation'!
|
|
|
903 |
|
|
|
904 |
basicNew
|
|
|
905 |
"return a new quadFloat - here we return 0.0
|
|
|
906 |
- QuadFloats are usually NOT created this way ...
|
|
|
907 |
Its implemented here to allow things like binary store & load
|
|
|
908 |
of quadFloats.
|
|
|
909 |
(but it is not a good idea to store the bits of a float - the reader might have a
|
|
|
910 |
totally different representation - so floats should be
|
|
|
911 |
binary stored in a device independent format)."
|
|
|
912 |
|
|
|
913 |
%{ /* NOCONTEXT */
|
|
4993
|
914 |
#ifdef SUPPORT_QUADFLOAT
|
|
4983
|
915 |
OBJ newFloat;
|
|
4991
|
916 |
|
|
|
917 |
if (sizeof(long double) == sizeof(float128_t)) {
|
|
|
918 |
__qMKLFLOAT(newFloat, 0.0); /* OBJECT ALLOCATION */
|
|
4983
|
919 |
} else {
|
|
4991
|
920 |
float128_t qf;
|
|
4992
|
921 |
f64_to_f128M(0.0, &qf);
|
|
4991
|
922 |
__qMKQFLOAT(newFloat, qf); /* OBJECT ALLOCATION */
|
|
4983
|
923 |
}
|
|
|
924 |
RETURN (newFloat);
|
|
4993
|
925 |
#endif /* SUPPORT_QUADFLOAT */
|
|
|
926 |
%}.
|
|
|
927 |
self error:'QuadFloats not supported on this patform'
|
|
4983
|
928 |
|
|
|
929 |
"Created: / 06-06-2019 / 17:18:58 / Claus Gittinger"
|
|
|
930 |
!
|
|
|
931 |
|
|
|
932 |
fromFloat:aFloat
|
|
|
933 |
"return a new quadFloat, given a float value"
|
|
|
934 |
|
|
|
935 |
%{ /* NOCONTEXT */
|
|
4993
|
936 |
#ifdef SUPPORT_QUADFLOAT
|
|
4983
|
937 |
OBJ newFloat;
|
|
4991
|
938 |
float128_t f;
|
|
4983
|
939 |
|
|
|
940 |
if (__isFloatLike(aFloat)) {
|
|
4992
|
941 |
float64_t f = __floatVal(aFloat);
|
|
4991
|
942 |
float128_t qf;
|
|
|
943 |
|
|
4992
|
944 |
f64_to_f128M(f, &qf);
|
|
4991
|
945 |
__qMKQFLOAT(newFloat, qf); /* OBJECT ALLOCATION */
|
|
|
946 |
RETURN (newFloat);
|
|
4983
|
947 |
}
|
|
4993
|
948 |
#endif /* SUPPORT_QUADFLOAT */
|
|
4983
|
949 |
%}.
|
|
4993
|
950 |
aFloat isFloat ifTrue:[
|
|
4997
|
951 |
self errorUnsupported
|
|
4993
|
952 |
].
|
|
4997
|
953 |
ArgumentError raise
|
|
4983
|
954 |
|
|
|
955 |
"
|
|
|
956 |
QuadFloat fromFloat:123.0
|
|
|
957 |
123.0 asQuadFloat
|
|
|
958 |
123 asQuadFloat
|
|
|
959 |
"
|
|
|
960 |
|
|
|
961 |
"Created: / 06-06-2019 / 18:01:03 / Claus Gittinger"
|
|
|
962 |
! !
|
|
|
963 |
|
|
|
964 |
!QuadFloat class methodsFor:'coercing & converting'!
|
|
|
965 |
|
|
|
966 |
coerce:aNumber
|
|
|
967 |
"convert the argument aNumber into an instance of the receiver's class and return it."
|
|
|
968 |
|
|
|
969 |
^ aNumber asQuadFloat.
|
|
|
970 |
|
|
|
971 |
"Created: / 06-06-2019 / 16:51:01 / Claus Gittinger"
|
|
|
972 |
! !
|
|
|
973 |
|
|
|
974 |
!QuadFloat class methodsFor:'constants'!
|
|
|
975 |
|
|
|
976 |
NaN
|
|
|
977 |
"return a shortFloat which represents not-a-Number (i.e. an invalid number)"
|
|
|
978 |
|
|
|
979 |
NaN isNil ifTrue:[
|
|
4991
|
980 |
NaN := super NaN
|
|
4983
|
981 |
].
|
|
|
982 |
^ NaN
|
|
|
983 |
|
|
|
984 |
"
|
|
|
985 |
self NaN
|
|
|
986 |
"
|
|
|
987 |
|
|
|
988 |
"Created: / 06-06-2019 / 16:56:09 / Claus Gittinger"
|
|
|
989 |
!
|
|
|
990 |
|
|
|
991 |
e
|
|
|
992 |
"return the constant e as quadFloat"
|
|
|
993 |
|
|
|
994 |
E isNil ifTrue:[
|
|
4991
|
995 |
"/ eDigits has enough digits for 128bit IEEE quads
|
|
|
996 |
"/ do not use as a literal constant here - we cannot depend on the underlying C-compiler here...
|
|
|
997 |
E := self readFrom:(Number eDigits)
|
|
4983
|
998 |
].
|
|
|
999 |
^ E
|
|
|
1000 |
|
|
|
1001 |
"Created: / 06-06-2019 / 17:01:54 / Claus Gittinger"
|
|
|
1002 |
!
|
|
|
1003 |
|
|
|
1004 |
pi
|
|
|
1005 |
"return the constant pi as quadFloat"
|
|
|
1006 |
|
|
|
1007 |
Pi isNil ifTrue:[
|
|
4991
|
1008 |
"/ piDigits has enough digits for 128bit IEEE quads
|
|
|
1009 |
"/ do not use as a literal constant here - we cannot depend on the underlying C-compiler here...
|
|
|
1010 |
Pi := self readFrom:(Number piDigits)
|
|
4983
|
1011 |
].
|
|
|
1012 |
^ Pi
|
|
|
1013 |
|
|
|
1014 |
"Created: / 06-06-2019 / 17:09:51 / Claus Gittinger"
|
|
|
1015 |
! !
|
|
|
1016 |
|
|
4994
|
1017 |
!QuadFloat methodsFor:'double dispatching'!
|
|
|
1018 |
|
|
4997
|
1019 |
errorUnsupported
|
|
|
1020 |
self error:'QuadFloats not supported on this patform'
|
|
|
1021 |
!
|
|
|
1022 |
|
|
4994
|
1023 |
sumFromQuadFloat:aQuadFloat
|
|
|
1024 |
%{
|
|
4997
|
1025 |
#ifdef SUPPORT_QUADFLOAT
|
|
4994
|
1026 |
OBJ newFloat;
|
|
|
1027 |
float128_t result, myVal, argVal;
|
|
|
1028 |
|
|
|
1029 |
myVal = __quadFloatVal(self);
|
|
|
1030 |
argVal = __quadFloatVal(aQuadFloat);
|
|
|
1031 |
f128M_add( &myVal, &argVal, &result );
|
|
|
1032 |
__qMKQFLOAT(newFloat, result);
|
|
|
1033 |
RETURN ( newFloat );
|
|
4997
|
1034 |
#endif // SUPPORT_QUADFLOAT
|
|
|
1035 |
%}.
|
|
|
1036 |
self errorUnsupported
|
|
4994
|
1037 |
! !
|
|
|
1038 |
|
|
|
1039 |
!QuadFloat methodsFor:'arithmetic'!
|
|
|
1040 |
|
|
|
1041 |
* aNumber
|
|
|
1042 |
"return the product of the receiver and the argument."
|
|
|
1043 |
|
|
|
1044 |
^ aNumber productFromQuadFloat:self
|
|
|
1045 |
!
|
|
|
1046 |
|
|
|
1047 |
+ aNumber
|
|
|
1048 |
"return the sum of the receiver and the argument, aNumber"
|
|
|
1049 |
|
|
|
1050 |
^ aNumber sumFromQuadFloat:self
|
|
|
1051 |
!
|
|
|
1052 |
|
|
|
1053 |
- aNumber
|
|
|
1054 |
"return the difference of the receiver and the argument, aNumber"
|
|
|
1055 |
|
|
|
1056 |
^ aNumber differenceFromQuadFloat:self
|
|
|
1057 |
!
|
|
|
1058 |
|
|
|
1059 |
/ aNumber
|
|
|
1060 |
"return the quotient of the receiver and the argument, aNumber"
|
|
|
1061 |
|
|
|
1062 |
aNumber isZero ifTrue:[
|
|
|
1063 |
"
|
|
|
1064 |
No, you shalt not divide by zero
|
|
|
1065 |
"
|
|
|
1066 |
^ ZeroDivide raiseRequestWith:thisContext.
|
|
|
1067 |
].
|
|
|
1068 |
^ aNumber quotientFromQuadFloat:self
|
|
|
1069 |
!
|
|
|
1070 |
|
|
|
1071 |
rem: aNumber
|
|
|
1072 |
"return the floating point remainder of the receiver and the argument, aNumber"
|
|
|
1073 |
|
|
|
1074 |
aNumber isZero ifTrue:[
|
|
|
1075 |
"
|
|
|
1076 |
No, you shalt not divide by zero
|
|
|
1077 |
"
|
|
|
1078 |
^ ZeroDivide raiseRequestWith:thisContext.
|
|
|
1079 |
].
|
|
|
1080 |
^ aNumber remainderFromLongFloat:self
|
|
|
1081 |
! !
|
|
|
1082 |
|
|
4983
|
1083 |
!QuadFloat class methodsFor:'documentation'!
|
|
|
1084 |
|
|
|
1085 |
version_CVS
|
|
|
1086 |
^ '$Header$'
|
|
|
1087 |
! !
|